Design and Architecture of
Digital Computers:
An Introduction

Miss Gloria Ruth Gorden and Mrs. Ester Gertson programming the ENIAC

Edward L. Bosworth, Ph.D.
TSYS School of Computer Science

Columbus State University
4225 University Avenue
Columbus, GA 31907

bosworth_edward@ColumbusState.edu
Copyright © 2011 by Edward L. Bosworth, Ph.D.

Table of Contents

Chapter 1 Historical and Economic Development of Computing Machines 1
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Chapter 2 The Power Wall and Multicore Computers 69
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Chapter 3 Data Representation 78
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Chapter 4 Boolean Algebra and Some Combinational Circuits 131
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Chapter 4A CMOS Implementation of the Digital Gates 190
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Chapter 5 Minimization of Boolean Functions 193
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Chapter 6 More Combinational Circuits 206
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Chapter 7 Latches, Flip–Flops, and Registers 271
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Chapter 8 Analysis and Design of Sequential Circuits 310
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Chapter 8A Design of a 11011 Sequence Detector 345
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Chapter 9 Memory Organization and Addressing 360
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Chapter 9A Interfacing the CPU to SDRAM 412
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Chapter 10 Overview of Busses 416
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Chapter 11 Overview of Disks and Disk Drives 432
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Chapter 12 Overview of Computer Architecture 444
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Chapter 13 The Instruction Set Architecture 466
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Chapter 14 Design of the Central Processing Unit 489
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Chapter 15 Implementation of the Central Processing Unit 521
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Chapter 16 Input / Output Design 562
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Chapter 17 Assessing Computer Performance 586
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Chapter 18 The Cray Line of Supercomputers 594
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Chapter 19 Parallel Processing 605
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References 638
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